This invention relates generally to power supply converters and more particularly to hysteretic-controlled power supply converters.
Three basic switching power supply topologies commonly used are buck, boost, and buck-boost. Of these, the simplest and most common is the buck converter. A simplified diagram of a buck converter controlled by commercially available controller manufactured by Texas Instruments Incorporated as TI TPS5210 is shown in FIG. 1. The high side driver 50 and the low side driver 60 are alternately driven by the controller in order to increase or decrease the output voltage and maintain the output voltage within a certain desired range.
Various methods have been used to control these power supplies in order to maintain an accurate and stable output voltage. Two of the most common methods are hysteretic control, such as is used by the TPS5210, and pulse width modulation (PWM). Hysteretic controllers, or ripple regulators as they are commonly called, continually monitor the output voltage. If the output voltage is too low, the high side driver (MOSFET 50, for example) is turned on to increase the output voltage and if the output voltage is too high, the high side driver is turned off and a low side driver (MOSFET 60, for example) is turned on to decrease the output voltage. The resultant output voltage is therefore proportional to the ratio of the time the high side driver is on to the time the low side driver is on. If the high side driver is on more than the low side driver then voltage on the output (Vout) is closer to the input voltage than zero volts and if the low side driver is on more than the high side driver then the voltage on the output is closer to zero volts than the input voltage. The main advantage to this method of control is that the transient response of the controller is very good. Hysteretic controllers decide when to turn on these high and low side drivers based solely a direct measurement of the output voltage. If there is a sudden change in the output load, the system can respond very quickly. This is very important for many applications, such as microprocessors and modem DSP systems, which have very large power loads that can change very quickly.
The PWM feedback method is also commonly used to control the high and low side drivers. PWM systems typically use an oscillator to generate a square wave. Depending on the level of output voltage, thexe2x80x9cmark-to-spacexe2x80x9d ratio of that square wave can be changed and the resultant square wave can be used to control the high and low side drivers. PWM schemes have a significant disadvantage, however, in that a substantial time lag is built into this feedback and therefore they do not exhibit a good transient response.
Prior art hysteretic control systems have a significant disadvantage over a PWM system, however, in that they allow a relatively large variability of the switching frequency (switching of the output voltage ripple). Unlike PWM controllers, hysteretic controllers do not have good frequency control. As is shown on the ideal triangle waveform output in FIG. 2a, the output voltage oscillates about the goal voltage and the amplitude of the oscillation is equal to the amount of hysteresis set in the controller. The output voltage waveform in reality is not a clean triangle waveform but looks more like the waveform shown in FIG. 2b. This is due to the finite delay in the feedback of the system. This deviation is not significant but results in some overshoot and undershoot of the set hysteresis levels. In addition and more significantly, although the amplitude of the ripple is relatively fixed by the hysteresis level, the frequency of the ripple can vary and is not necessarily uniform. This is mainly due to the parasitic elements in the circuit, such as the equivalent series resistance (ESR) and equivalent series inductance (ESL) in the output capacitor C2. The size of these parasitics varies significantly and therefore there is a lot of variability among power supply units in the resultant oscillation frequency. This variability is undesirable because at too high a frequency, too much power is dissipated by switching losses in the switching transistors, and at too low a frequency the current peaks will be larger causing the switching transistors to dissipate more power and requiring the power supply inductor to be over-designed. This variation in frequency can be substantially reduced by changes in the ESRs and ESLs associated with the capacitor used in the system. For cheap components these parasitics are quite variable. To make the parasitics small and have the frequency less variable, expensive components must be used. A system must be designed to accommodate both the lowest and highest frequencies that the system might operate at. For prior art hysteretic systems, therefore, expensive capacitors having very small values of ESR and ESL must be specified in order to minimize the variations in operating frequency. This problem associated with prior art hysteretic controllers can therefore be minimized but only at a high cost. Another disadvantage stemming from this difficulty of hysteretic controllers to control switching frequency, is that in some sensitive applications, such as communications, the switchmode power supply may be required to operate within certain frequency bands in order to avoid unwanted electromagnetic interference generation. The tighter these frequency bands are the more difficult they will be to meet with a hysteretic-controlled system. A PWM controller can easily meet these types of specifications because the oscillator can be fixed at whatever frequency is required and the resulting harmonics will simply be those of the oscillator. This is a significant advantage of the PWM control system over the hysteretic-controlled system. The PWM controller can he arbitrarily set as accurately as required.
An alternative that has been used to deal with this disadvantage of the hysteretic-controlled system is a hybrid PWM/hysteretic control system. This type of controller is normally PWM controlled. If thresholds built into the output voltage are exceeded, however, the hysteretic control circuitry kicks in. The problem with this type of system is that the transient response will suffer because these threshold limits must be set far enough away from the normal operation of the PWM controller in order not to continually trigger the hysteretic control circuitry. In addition, the amount of circuitry and complexity is increased.
Thus there is a need for a power supply controller that has good switching frequency control in addition to a good transient response.
A brief description of a prior art hysteretic-controlled power supply system will now be provided with reference to FIG. 1. FIG. 1 shows a block diagram of a typical buck power supply controlled by a hysteretic-controlled synchronous-buck controller. The hysteretic controller shown in FIG. 1 is a TPS5210 but can be any number of hysteretic controllers currently available. The specific workings of the TPS5210 and buck power stages in switchmode power supplies are described in detail in the following papers available from Texas Instruments Incorporated. These include 1)xe2x80x9cUnderstanding Buck Power Stages in Switchmode Power Suppliesxe2x80x9d, an application report from the Texas Instruments Incorporated, Mixed Signal Products Literature #SLVA057; 2)xe2x80x9cDesigning Fast Response Synchronous Buck Regulators Using the TPS5210xe2x80x9d, also an application report from the Texas Instruments Incorporated, Mixed Signal Products Literature #SLVA044; and 3)xe2x80x9cHigh Performance Synchronous Buck EVM Using the TPS5210xe2x80x9d, a TPS5210 user""s guide from the Texas Instruments Incorporated, Mixed Signal Products Literature #SLVU010. The hysteretic controller 10 receives as an input VHYST, which sets the hysteresis levels for the hysteretic controller. As is shown in the figure, the level is set by voltage divider 600. Voltage divider 600 is formed by resistors R3 and R4 connected in series between the VREFB voltage input and ground. VHYST is tapped from node 95, located between resistors R3 and R4. Hysteretic controller 10 also receives, as an input, VSENSE, generated by feedback from main output voltage, Vout. Hysteretic controller 10 generates output signals HIGHDR and LOWDR, which are connected to the gates of high driver power MOSFET 50, and low driver power MOSFET 60 respectively. High driver 50 has a drain connected to the HISENSE input of hysteretic controller 10 and also connected to one side of inductor L1 and the top plate of capacitor C1. The other side of inductor L1 is connected to high voltage input, Vin. The bottom plate of capacitor C1 is connected to ground. The source of high driver 50 is connected to the Vphase node. The Vphase node is also connected to the drain of low driver 60 and to one side of inductor L2. The source of low driver 60 is connected to ground. The other side of inductor L2 is connected to the output voltage node, on which is generated the output ripple voltage. A capacitor C2 is connected between the output voltage node and ground. The output voltage node also has a feedback connection to the VSENSE input.
In operation, the hysteretic controller 10 outputs an active level signal on the HIGHDR output and an inactive level signal on the LOWDR output in order to turn on the high driver 50 and turn off the low driver 60 thereby increasing the voltage on Vpbase and Vout Alternately controller 10 outputs an active level signal on the LOWDR output and an inactive level signal on the HIGHDR output in order to turn on the low driver 60 and turn off the high driver 50 thereby pulling down the voltage on Vphase and Vout. In order to determine when to output these signals and turn on the appropriate driver, the Vout signal is fed back to the VSENSE input to the controller. The VSENSE input is used to indicate whether the upper or lower hysteresis level VHI or VLOW in FIG. 2a), has been reached. If one of these hysteresis levels has been reached by the output ripple voltage, Vout, the hysteretic controller generates the appropriate signals on HIGHDR and LOWDR and thereby tuning on the appropriate driver to pull the output voltage toward the opposite hysteresis level. In this manner, Vout, continues to ripple between the hysteresis levels, VHI and VLOW, as shown in FIG. 2a. The overshoot and undershoot, illustrated in FIG. 2b are caused by the delay in the feedback in turning on the appropriate driver to drive the output voltage in the opposite direction. Although the amplitude of the output voltage ripple is controllable by the presence of the fixed hysteresis levels in the controller, the frequency of the ripple is not. The frequency of the ripple can be quite variable depending on the parasitic elements in the power supply.
These problems associated with current power supply controllers are solved by using a hysteretic controller including a feedback circuit that monitors the output frequency of the controller, compares it to a reference generated either internally or externally by the user, and then adjusts the hysteresis of the controller according to the error measured in the comparison. The adjusted hysteresis levels will subsequently cause the switching frequency to either increase or decrease thereby controlling the switching frequency of the power supply controller and maintaining it at a desired level.